HomeNewsGraphene to disrupt semiconductor industry - University of California

Graphene to disrupt semiconductor industry – University of California


In November 2018, researchers from the University of California published a paper on CMOS-compatible graphene interconnects. 

Following that research, a team from the University of California engineering researchers recently came out with an innovative way to consume or utilize nanometre-scale doped multilayer graphene (DMG) interconnects well suited to the mass production of ICs.

Image result for graphene interconnects

For more than 20 years, interconnects have been build using copper as the base material, yet, the disadvantages of this metal when shrinking it to the nanoscale resistivity increase, which poses a “fundamental threat to the $500 billion semiconductor industry,” say researchers at UCSB.

 Graphene possesses the potential to resolve the issue as a global desire for smarter, faster, lighter and feasible technology and devices continue to widen.

“As you reduce the dimensions of copper wires, their resistivity shoots up,” states Kaustav Banerjee, a professor in the Department of Electrical and Computer Engineering. 

Resistivity is an essential property that material possesses, that is not supposed to change, but at the nanoscale, all properties change.

The UCSB team now believes it has found a promising innovative way to use graphene for interconnects. However, it is not a case of simply replacing copper with graphene in the manufacturing process as research is still being carried out.

 Therefore, transposing the material from the university or other facility testing environments to high-volume production and wide-spread usage is yet another obstacle that must be overcome.

Graphene to disrupt semiconductor industry - University of California 1

Professor Banerjee states that the only way the semiconductor industry will move forwards is when “you find a way to synthesize graphene directly onto silicon wafers.” 

Issues arise back-end synthesizing after the transistors are fabricated – you face a thermal budget that can’t exceed a temperature of about 500 degrees Celsius.

If the silicon wafer gets too hot during the back-end processes employed to fabricate the interconnects, other elements that are already on the chip may get damaged, or some impurities may start diffusing, changing the characteristics of the transistors. Implementing interconnects in high-performance devices will significantly reduce the cost of production and machines to  become lighter in terms of weight. 

James J
James J
James has been writing about tech since 2009 after spending 25 years in a computer research lab studying computers. He watches Netflix, especially sci-fi with his pet lie enjoying chips.
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